A redistribution layer, or simply an RDL, is used to maintain existing wafer level package designs while accommodating the smaller die produced by semiconductor manufacturers transitioning to advanced technology nodes.
The redistribution layer in a package may be formed by, for example, alternately patterning a polymer layer to form a polymer via and then plating the polymer via. The process may generally continue in this manner until a suitable number of redistribution layers have been produced within the package.
Unfortunately, each successive polymer via in the above process has a smaller width and a larger depth than the one before. Therefore, the polymer via layout pattern will demand a relatively large portion of the topography within the package in order to accommodate the size of the first polymer via formed, which is the largest. Also, because the depth of each successive polymer via increases relative to the one formed before, the uniformity of the critical dimension of the polymer via (e.g., the width of the polymer via at the bottom thereof) is much harder to control.
The polymer via layout pattern is also subject to polymer under developing, may induce high stress in the package, and may result in poor reliability for the package.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the embodiments and are not necessarily drawn to scale.